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cuda : update supports_op for matrix multiplication (#8245)
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@ -2711,27 +2711,40 @@ GGML_CALL static bool ggml_backend_cuda_supports_op(ggml_backend_t backend, cons
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case GGML_OP_MUL_MAT:
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case GGML_OP_MUL_MAT:
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case GGML_OP_MUL_MAT_ID:
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case GGML_OP_MUL_MAT_ID:
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{
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{
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struct ggml_tensor * a;
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struct ggml_tensor * a = op->src[0];
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struct ggml_tensor * b;
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if (op->op == GGML_OP_MUL_MAT) {
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if (op->op == GGML_OP_MUL_MAT) {
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a = op->src[0];
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struct ggml_tensor * b = op->src[1];
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b = op->src[1];
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} else {
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a = op->src[2];
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b = op->src[1];
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}
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if (a->ne[3] != b->ne[3]) {
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if (a->ne[3] != b->ne[3]) {
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return false;
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return false;
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}
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}
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ggml_type a_type = a->type;
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}
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if (a_type == GGML_TYPE_IQ2_XXS || a_type == GGML_TYPE_IQ2_XS || a_type == GGML_TYPE_IQ3_XXS ||
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switch (a->type) {
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a_type == GGML_TYPE_IQ1_S || a_type == GGML_TYPE_IQ4_NL || a_type == GGML_TYPE_IQ3_S ||
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case GGML_TYPE_F32:
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a_type == GGML_TYPE_IQ1_M || a_type == GGML_TYPE_IQ2_S || a_type == GGML_TYPE_IQ4_XS) {
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case GGML_TYPE_F16:
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if (b->ne[1] == 1 && ggml_nrows(b) > 1) {
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case GGML_TYPE_Q4_0:
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case GGML_TYPE_Q4_1:
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case GGML_TYPE_Q5_0:
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case GGML_TYPE_Q5_1:
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case GGML_TYPE_Q8_0:
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case GGML_TYPE_Q2_K:
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case GGML_TYPE_Q3_K:
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case GGML_TYPE_Q4_K:
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case GGML_TYPE_Q5_K:
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case GGML_TYPE_Q6_K:
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case GGML_TYPE_Q8_K:
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case GGML_TYPE_IQ1_M:
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case GGML_TYPE_IQ1_S:
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case GGML_TYPE_IQ2_S:
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case GGML_TYPE_IQ2_XS:
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case GGML_TYPE_IQ2_XXS:
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case GGML_TYPE_IQ3_S:
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case GGML_TYPE_IQ3_XXS:
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case GGML_TYPE_IQ4_NL:
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case GGML_TYPE_IQ4_XS:
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return true;
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default:
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return false;
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return false;
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}
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}
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}
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return true;
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} break;
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} break;
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case GGML_OP_GET_ROWS:
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case GGML_OP_GET_ROWS:
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{
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{
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@ -2052,6 +2052,7 @@ static bool test_backend(ggml_backend_t backend, test_mode mode, const char * op
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GGML_TYPE_IQ2_XS, GGML_TYPE_IQ2_S,
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GGML_TYPE_IQ2_XS, GGML_TYPE_IQ2_S,
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GGML_TYPE_IQ3_XXS, GGML_TYPE_IQ1_S, GGML_TYPE_IQ1_M,
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GGML_TYPE_IQ3_XXS, GGML_TYPE_IQ1_S, GGML_TYPE_IQ1_M,
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GGML_TYPE_IQ4_NL, GGML_TYPE_IQ3_S, GGML_TYPE_IQ4_XS,
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GGML_TYPE_IQ4_NL, GGML_TYPE_IQ3_S, GGML_TYPE_IQ4_XS,
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GGML_TYPE_BF16,
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};
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};
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// unary ops
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// unary ops
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