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Metal: faster Q4_0 and Q4_1 matrix x vector kernels (#2212)
* 3-5% faster Q4_0 on Metal * 7-25% faster Q4_1 on Metal * Oops, forgot to delete the original Q4_1 kernel --------- Co-authored-by: Iwan Kawrakow <iwan.kawrakow@gmail.com>
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Kawrakow
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@ -739,12 +739,8 @@ void ggml_metal_graph_compute(
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[encoder setBytes:&ne0 length:sizeof(ne0) atIndex:13];
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[encoder setBytes:&ne1 length:sizeof(ne1) atIndex:14];
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if (src0t == GGML_TYPE_Q4_0) {
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[encoder dispatchThreadgroups:MTLSizeMake(ne01 / 8+((ne01 % 8) & 0x01), ne11, 1) threadsPerThreadgroup:MTLSizeMake(nth0, nth1, 1)];
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}
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else if (src0t == GGML_TYPE_Q4_1) {
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[encoder setThreadgroupMemoryLength:nth0*nth1*sizeof(float) atIndex:0];
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[encoder dispatchThreadgroups:MTLSizeMake(ne01, ne11, 1) threadsPerThreadgroup:MTLSizeMake(nth0, nth1, 1)];
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if (src0t == GGML_TYPE_Q4_0 || src0t == GGML_TYPE_Q4_1) {
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[encoder dispatchThreadgroups:MTLSizeMake((ne01 + 7) / 8, ne11, 1) threadsPerThreadgroup:MTLSizeMake(nth0, nth1, 1)];
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}
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else if (src0t == GGML_TYPE_Q2_K ||
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src0t == GGML_TYPE_Q3_K ||
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182
ggml-metal.metal
182
ggml-metal.metal
@ -395,9 +395,12 @@ kernel void kernel_mul_mat_q4_0_f32(
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// each thread in a SIMD group deals with 1 block.
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for (int column = 0; column < nb / N_SIMDWIDTH; column++) {
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float sumy = 0;
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for (int i = 0; i < QK4_0 / 4; i++) {
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y_curr[i] = *((device float4 *)(y + N_SIMDWIDTH * (tiisg + column * QK4_0) + 4 * i));
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sumy += y_curr[i][0] + y_curr[i][1] + y_curr[i][2] + y_curr[i][3];
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}
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sumy *= (-8.f);
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for (int row = 0; row < N_DST; row++) {
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// prefetch next x block
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@ -405,39 +408,50 @@ kernel void kernel_mul_mat_q4_0_f32(
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// calculate
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float d = qb_curr.d;
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float2 acc = {0.0f, 0.0f};
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float acc = sumy;
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for (int i = 0; i < 16; i++) {
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acc[0] += yl[i] * (qb_curr.qs[i] & 0xF) + yl[i+16] * (qb_curr.qs[i] >> 4);
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acc[1] += yl[i] + yl[i+16];
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acc += yl[i] * (qb_curr.qs[i] & 0xF) + yl[i+16] * (qb_curr.qs[i] >> 4);
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}
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sumf[row] += d * (acc[0] - 8.f*acc[1]);
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sumf[row] += d * acc;
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qb_curr = qb_next;
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}
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}
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for (int i = 0; i < QK4_0 / 4; i++) {
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y_curr[i] = *((device float4 *)(y + N_SIMDWIDTH * (tiisg + (nb / N_SIMDWIDTH) * QK4_0) + 4 * i));
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}
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for (int row = 0; row < N_DST; row++) {
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// prefetch next x block
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qb_next = x[tiisg + ((row + 1) % N_DST) * nb + (nb / N_SIMDWIDTH + ((row + 1) / N_DST)) * N_SIMDWIDTH];
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// calculate
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float d = qb_curr.d;
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float2 acc = {0.0f, 0.0f};
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for (int i = 0; i < 16; i++) {
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acc[0] += yl[i] * (qb_curr.qs[i] & 0xF) + yl[i+16] * (qb_curr.qs[i] >> 4);
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acc[1] += yl[i] + yl[i+16];
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if (nb % N_SIMDWIDTH == 0) {
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for (int row = 0; row < N_DST; ++row) {
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all_sum = simd_sum(sumf[row]);
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if (tiisg == 0 && ((r0 * N_SIMDGROUP + sgitg) * N_DST + row) < ne01) {
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dst[r1*ne0 + (r0 * N_SIMDGROUP + sgitg) * N_DST + row] = all_sum;
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}
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}
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if (tiisg < nb % N_SIMDWIDTH) {
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sumf[row] += d * (acc[0] - 8.f*acc[1]);
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}
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qb_curr = qb_next;
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} else {
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all_sum = simd_sum(sumf[row]);
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if (tiisg == 0 && ((r0 * N_SIMDGROUP + sgitg) * N_DST + row) < ne01) {
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dst[r1*ne0 + (r0 * N_SIMDGROUP + sgitg) * N_DST + row] = all_sum;
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float sumy = 0;
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for (int i = 0; i < QK4_0 / 4; i++) {
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y_curr[i] = *((device float4 *)(y + N_SIMDWIDTH * (tiisg + (nb / N_SIMDWIDTH) * QK4_0) + 4 * i));
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sumy += y_curr[i][0] + y_curr[i][1] + y_curr[i][2] + y_curr[i][3];
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}
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sumy *= (-8.f);
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for (int row = 0; row < N_DST; row++) {
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// prefetch next x block
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qb_next = x[tiisg + ((row + 1) % N_DST) * nb + (nb / N_SIMDWIDTH + ((row + 1) / N_DST)) * N_SIMDWIDTH];
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// calculate
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float d = qb_curr.d;
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float acc = sumy;
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for (int i = 0; i < 16; i++) {
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acc += yl[i] * (qb_curr.qs[i] & 0xF) + yl[i+16] * (qb_curr.qs[i] >> 4);
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}
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if (tiisg < nb % N_SIMDWIDTH) {
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sumf[row] += d * acc;
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}
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qb_curr = qb_next;
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all_sum = simd_sum(sumf[row]);
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if (tiisg == 0 && ((r0 * N_SIMDGROUP + sgitg) * N_DST + row) < ne01) {
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dst[r1*ne0 + (r0 * N_SIMDGROUP + sgitg) * N_DST + row] = all_sum;
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}
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}
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}
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}
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@ -449,65 +463,83 @@ kernel void kernel_mul_mat_q4_1_f32(
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constant int64_t & ne00,
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constant int64_t & ne10,
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constant int64_t & ne0,
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threadgroup float * sum [[threadgroup(0)]],
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constant int64_t & ne01[[buffer(4)]],
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uint2 tgpig[[threadgroup_position_in_grid]],
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uint2 tpitg[[thread_position_in_threadgroup]],
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uint2 tptg[[threads_per_threadgroup]]) {
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const int nb = ne00/QK4_1;
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const int64_t r0 = tgpig.x;
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const int64_t r1 = tgpig.y;
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device const block_q4_1 * x = (device const block_q4_1 *) src0 + r0*nb;
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uint tiisg[[thread_index_in_simdgroup]],
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uint sgitg[[simdgroup_index_in_threadgroup]]) {
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const int nb = ne00/QK4_0;
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const int r0 = tgpig.x;
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const int r1 = tgpig.y;
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device const block_q4_1 * x = (device const block_q4_1 *) src0 + (r0 * N_SIMDGROUP + sgitg) * N_DST * nb;
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device const float * y = (device const float *) src1 + r1*ne10;
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block_q4_1 qb_curr, qb_next;
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float4 y_curr[8]; // src1 vector cache
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float sumf[N_DST]={0.f}, all_sum;
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thread float * yl=(thread float *)y_curr;
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const uint nth = tptg.x*tptg.y;
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const uint ith = tptg.y*tpitg.x + tpitg.y;
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const int ix = tpitg.y/4; // 0 or 1
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const int iy = tpitg.y - 4*ix; // 0...3
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const int first = 4 * iy;
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float sumf = 0;
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for (int i = 2*tpitg.x + ix; i < nb; i += 2*tptg.x) {
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const float d = (float)x[i].d;
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const float m = (float)x[i].m;
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device const uint8_t * xl = x[i].qs + first;
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device const float * yl = y + i * QK4_1 + first;
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float2 acc = {0.0f, 0.0f};
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for (int j = 0; j < 4; ++j) {
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acc[0] += yl[j+ 0] * (d * (xl[j] & 0xF) + m);
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acc[1] += yl[j+16] * (d * (xl[j] >> 4) + m);
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// bootstrap
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qb_curr = x[tiisg];
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// each thread in a SIMD group deals with 1 block.
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for (int column = 0; column < nb / N_SIMDWIDTH; column++) {
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float sumy = 0;
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for (int i = 0; i < QK4_0 / 4; i++) {
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y_curr[i] = *((device float4 *)(y + N_SIMDWIDTH * (tiisg + column * QK4_0) + 4 * i));
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sumy += y_curr[i][0] + y_curr[i][1] + y_curr[i][2] + y_curr[i][3];
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}
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sumf += acc[0] + acc[1];
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for (int row = 0; row < N_DST; row++) {
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// prefetch next x block
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qb_next = x[tiisg + ((row + 1) % N_DST) * nb + (column + ((row + 1) / N_DST)) * N_SIMDWIDTH];
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// calculate
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const float d = qb_curr.d;
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const float m = qb_curr.m;
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float acc = 0.f;
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for (int i = 0; i < 16; i++) {
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acc += yl[i] * (qb_curr.qs[i] & 0xF) + yl[i+16] * (qb_curr.qs[i] >> 4);
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}
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sumf[row] += d * acc + m * sumy;
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qb_curr = qb_next;
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}
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}
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sum[ith] = sumf;
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if (nb % N_SIMDWIDTH == 0) {
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for (int row = 0; row < N_DST; ++row) {
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all_sum = simd_sum(sumf[row]);
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if (tiisg == 0 && ((r0 * N_SIMDGROUP + sgitg) * N_DST + row) < ne01) {
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dst[r1*ne0 + (r0 * N_SIMDGROUP + sgitg) * N_DST + row] = all_sum;
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}
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}
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} else {
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//
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// Accumulate the sum from all threads in the threadgroup
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//
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threadgroup_barrier(mem_flags::mem_threadgroup);
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if (ith%4 == 0) {
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sum[ith] += sum[ith+1] + sum[ith+2] + sum[ith+3];
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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if (ith%16 == 0) {
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sum[ith] += sum[ith+4] + sum[ith+8] + sum[ith+12];
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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if (ith == 0) {
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for (uint i = 16; i < nth; i += 16) sum[0] += sum[i];
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dst[r1*ne0 + r0] = sum[0];
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float sumy = 0;
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for (int i = 0; i < QK4_0 / 4; i++) {
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y_curr[i] = *((device float4 *)(y + N_SIMDWIDTH * (tiisg + (nb / N_SIMDWIDTH) * QK4_0) + 4 * i));
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sumy += y_curr[i][0] + y_curr[i][1] + y_curr[i][2] + y_curr[i][3];
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}
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for (int row = 0; row < N_DST; row++) {
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// prefetch next x block
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qb_next = x[tiisg + ((row + 1) % N_DST) * nb + (nb / N_SIMDWIDTH + ((row + 1) / N_DST)) * N_SIMDWIDTH];
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// calculate
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const float d = qb_curr.d;
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const float m = qb_curr.m;
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float acc = 0.f;
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for (int i = 0; i < 16; i++) {
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acc += yl[i] * (qb_curr.qs[i] & 0xF) + yl[i+16] * (qb_curr.qs[i] >> 4);
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}
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if (tiisg < nb % N_SIMDWIDTH) {
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sumf[row] += d * acc + m * sumy;
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}
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qb_curr = qb_next;
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all_sum = simd_sum(sumf[row]);
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if (tiisg == 0 && ((r0 * N_SIMDGROUP + sgitg) * N_DST + row) < ne01) {
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dst[r1*ne0 + (r0 * N_SIMDGROUP + sgitg) * N_DST + row] = all_sum;
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}
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}
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}
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}
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