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~4-5% improvement for Q8_0 TG on metal
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@ -443,6 +443,8 @@ kernel void kernel_mul_mat_q4_1_f32(
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mul_vec_q_n_f32<block_q4_1, N_DST, N_SIMDGROUP, N_SIMDWIDTH>(src0,src1,dst,ne00,ne01,ne02,ne10,ne12,ne0,ne1,gqa,tgpig,tiisg,sgitg);
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mul_vec_q_n_f32<block_q4_1, N_DST, N_SIMDGROUP, N_SIMDWIDTH>(src0,src1,dst,ne00,ne01,ne02,ne10,ne12,ne0,ne1,gqa,tgpig,tiisg,sgitg);
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}
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}
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#define NB_Q8_0 8
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kernel void kernel_mul_mat_q8_0_f32(
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kernel void kernel_mul_mat_q8_0_f32(
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device const void * src0,
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device const void * src0,
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device const float * src1,
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device const float * src1,
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@ -471,30 +473,30 @@ kernel void kernel_mul_mat_q8_0_f32(
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device const block_q8_0 * x = (device const block_q8_0 *) src0 + offset0;
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device const block_q8_0 * x = (device const block_q8_0 *) src0 + offset0;
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device const float * y = (device const float *) src1 + r1*ne10 + im*ne00*ne1;
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device const float * y = (device const float *) src1 + r1*ne10 + im*ne00*ne1;
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float yl[16];
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float yl[NB_Q8_0];
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float sumf[nr]={0.f};
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float sumf[nr]={0.f};
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const int ix = tiisg/2;
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const int ix = tiisg/4;
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const int il = tiisg%2;
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const int il = tiisg%4;
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device const float * yb = y + ix * QK8_0 + 16*il;
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device const float * yb = y + ix * QK8_0 + NB_Q8_0*il;
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// each thread in a SIMD group deals with half a block.
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// each thread in a SIMD group deals with NB_Q8_0 quants at a time
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for (int ib = ix; ib < nb; ib += nw/2) {
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for (int ib = ix; ib < nb; ib += nw/4) {
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for (int i = 0; i < 16; ++i) {
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for (int i = 0; i < NB_Q8_0; ++i) {
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yl[i] = yb[i];
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yl[i] = yb[i];
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}
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}
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for (int row = 0; row < nr; row++) {
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for (int row = 0; row < nr; row++) {
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device const int8_t * qs = x[ib+row*nb].qs + 16*il;
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device const int8_t * qs = x[ib+row*nb].qs + NB_Q8_0*il;
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float sumq = 0.f;
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float sumq = 0.f;
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for (int iq = 0; iq < 16; ++iq) {
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for (int iq = 0; iq < NB_Q8_0; ++iq) {
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sumq += qs[iq] * yl[iq];
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sumq += qs[iq] * yl[iq];
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}
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}
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sumf[row] += sumq*x[ib+row*nb].d;
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sumf[row] += sumq*x[ib+row*nb].d;
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}
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}
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yb += QK8_0 * 16;
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yb += NB_Q8_0 * nw;
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}
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}
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for (int row = 0; row < nr; ++row) {
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for (int row = 0; row < nr; ++row) {
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