mirror of
https://github.com/ggerganov/llama.cpp.git
synced 2024-12-25 13:58:46 +01:00
Faster Q4_K on Metal (#2290)
Co-authored-by: Iwan Kawrakow <iwan.kawrakow@gmail.com>
This commit is contained in:
Kawrakow
GitHub
parent
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commit
785829dfe8
@ -694,8 +694,8 @@ void ggml_metal_graph_compute(
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GGML_ASSERT(ne02 == 1);
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GGML_ASSERT(ne12 == 1);
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nth0 = 4;
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nth1 = 16;
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nth0 = 2;
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nth1 = 32;
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[encoder setComputePipelineState:ctx->pipeline_mul_mat_q4_K_f32];
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} break;
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case GGML_TYPE_Q5_K:
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@ -739,7 +739,8 @@ void ggml_metal_graph_compute(
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[encoder setBytes:&ne0 length:sizeof(ne0) atIndex:13];
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[encoder setBytes:&ne1 length:sizeof(ne1) atIndex:14];
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if (src0t == GGML_TYPE_Q4_0 || src0t == GGML_TYPE_Q4_1) {
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if (src0t == GGML_TYPE_Q4_0 || src0t == GGML_TYPE_Q4_1 ||
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src0t == GGML_TYPE_Q4_K) {
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[encoder dispatchThreadgroups:MTLSizeMake((ne01 + 7) / 8, ne11, 1) threadsPerThreadgroup:MTLSizeMake(nth0, nth1, 1)];
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}
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else if (src0t == GGML_TYPE_Q2_K ||
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250
ggml-metal.metal
250
ggml-metal.metal
@ -1452,6 +1452,7 @@ kernel void kernel_mul_mat_q3_K_f32(
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}
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#if QK_K == 256
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kernel void kernel_mul_mat_q4_K_f32(
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device const void * src0,
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device const float * src1,
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@ -1459,132 +1460,181 @@ kernel void kernel_mul_mat_q4_K_f32(
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constant int64_t & ne00,
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constant int64_t & ne10,
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constant int64_t & ne0,
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threadgroup float * sum [[threadgroup(0)]],
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constant int64_t & ne01[[buffer(4)]],
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uint2 tgpig[[threadgroup_position_in_grid]],
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uint2 tpitg[[thread_position_in_threadgroup]],
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uint2 tptg[[threads_per_threadgroup]]) {
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const int nb = ne00/QK_K;
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const int64_t r0 = tgpig.x;
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const int64_t r1 = tgpig.y;
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const int nth = tptg.x*tptg.y;
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const int ith = tptg.y*tpitg.x + tpitg.y;
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device const block_q4_K * x = (device const block_q4_K *) src0 + r0*nb;
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device const float * yy = (device const float *) src1 + r1*ne10;
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float sumf = 0;
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#if QK_K == 256
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uint tiisg[[thread_index_in_simdgroup]],
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uint sgitg[[simdgroup_index_in_threadgroup]]) {
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const uint16_t kmask1 = 0x3f3f;
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const uint16_t kmask2 = 0x0f0f;
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const uint16_t kmask3 = 0xc0c0;
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const int tid = tpitg.y; // 0...16
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const int il = tid/4; // 0...3
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const int ir = tid - 4*il;// 0...3
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const int n = 4;
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const int ix = tiisg/8; // 0...3
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const int it = tiisg%8; // 0...7
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const int im = it/4; // 0 or 1
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const int ir = it%4; // 0...3
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const int im = il/2; // 0 or 1. 0 computes 0,32 + 128,160, 1 computes 64,96 + 192,224
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const int in = il%2;
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const int nb = ne00/QK_K;
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const int r0 = tgpig.x;
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const int r1 = tgpig.y;
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const int first_row = (r0 * N_SIMDGROUP + sgitg) * N_DST;
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const int ib_row = first_row * nb;
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device const block_q4_K * x = (device const block_q4_K *) src0 + ib_row;
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device const float * y = (device const float *) src1 + r1*ne10;
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float yl[16];
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float yh[16];
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float sumf[N_DST]={0.f}, all_sum;
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const int l0 = n*(2*ir + in);
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const int q_offset = 32*im + l0;
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const int y_offset = 64*im + l0;
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const int step = sizeof(block_q4_K) * nb / 2;
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uchar2 sc1, sc2, sc3, sc4;
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device const float * y4 = y + ix * QK_K + 64 * im + 8 * ir;
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for (int i = tpitg.x; i < nb; i += tptg.x) {
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uint16_t sc16[4];
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thread const uint8_t * sc8 = (thread const uint8_t *)sc16;
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device const uint8_t * q1 = (x + i)->qs + q_offset;
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device const uint8_t * q2 = q1 + 64;
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device const float * y1 = yy + i*QK_K + y_offset;
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device const float * y2 = y1 + 128;
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const float dall = (float)((x + i)->d);
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const float dmin = (float)((x + i)->dmin);
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device const uint16_t * a = (device const uint16_t *)(x + i)->scales;
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sc1 = as_type<uchar2>((uint16_t)(a[im+0] & kmask1));
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sc2 = as_type<uchar2>((uint16_t)(a[im+2] & kmask1));
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sc3 = as_type<uchar2>((uint16_t)(((a[im+4] >> 0) & kmask2) | ((a[im+0] & kmask3) >> 2)));
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sc4 = as_type<uchar2>((uint16_t)(((a[im+4] >> 4) & kmask2) | ((a[im+2] & kmask3) >> 2)));
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float4 s = {0.f, 0.f, 0.f, 0.f};
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float smin = 0;
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for (int l = 0; l < n; ++l) {
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s[0] += y1[l] * (q1[l] & 0xF); s[1] += y1[l+32] * (q1[l] >> 4);
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s[2] += y2[l] * (q2[l] & 0xF); s[3] += y2[l+32] * (q2[l] >> 4);
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smin += y1[l] * sc2[0] + y1[l+32] * sc2[1] + y2[l] * sc4[0] + y2[l+32] * sc4[1];
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for (int ib = ix; ib < nb; ib += 4) {
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float4 sumy = {0.f, 0.f, 0.f, 0.f};
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for (int i = 0; i < 8; ++i) {
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yl[i+0] = y4[i+ 0]; sumy[0] += yl[i+0];
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yl[i+8] = y4[i+ 32]; sumy[1] += yl[i+8];
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yh[i+0] = y4[i+128]; sumy[2] += yh[i+0];
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yh[i+8] = y4[i+160]; sumy[3] += yh[i+8];
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}
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sumf += dall * (s[0] * sc1[0] + s[1] * sc1[1] + s[2] * sc3[0] + s[3] * sc3[1]) - dmin * smin;
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device const uint16_t * sc = (device const uint16_t *)x[ib].scales + im;
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device const uint16_t * q1 = (device const uint16_t *)x[ib].qs + 16 * im + 4 * ir;
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device const half * dh = &x[ib].d;
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for (int row = 0; row < N_DST; row++) {
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sc16[0] = sc[0] & kmask1;
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sc16[1] = sc[2] & kmask1;
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sc16[2] = ((sc[4] >> 0) & kmask2) | ((sc[0] & kmask3) >> 2);
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sc16[3] = ((sc[4] >> 4) & kmask2) | ((sc[2] & kmask3) >> 2);
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device const uint16_t * q2 = q1 + 32;
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float4 acc1 = {0.f, 0.f, 0.f, 0.f};
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float4 acc2 = {0.f, 0.f, 0.f, 0.f};
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for (int i = 0; i < 8; i += 2) {
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acc1[0] += yl[i+0] * (q1[i/2] & 0x000F);
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acc1[1] += yl[i+1] * (q1[i/2] & 0x0F00);
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acc1[2] += yl[i+8] * (q1[i/2] & 0x00F0);
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acc1[3] += yl[i+9] * (q1[i/2] & 0xF000);
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acc2[0] += yh[i+0] * (q2[i/2] & 0x000F);
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acc2[1] += yh[i+1] * (q2[i/2] & 0x0F00);
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acc2[2] += yh[i+8] * (q2[i/2] & 0x00F0);
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acc2[3] += yh[i+9] * (q2[i/2] & 0xF000);
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}
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float dall = dh[0];
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float dmin = dh[1];
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sumf[row] += dall * ((acc1[0] + 1.f/256.f * acc1[1]) * sc8[0] +
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(acc1[2] + 1.f/256.f * acc1[3]) * sc8[1] * 1.f/16.f +
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(acc2[0] + 1.f/256.f * acc2[1]) * sc8[4] +
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(acc2[2] + 1.f/256.f * acc2[3]) * sc8[5] * 1.f/16.f) -
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dmin * (sumy[0] * sc8[2] + sumy[1] * sc8[3] + sumy[2] * sc8[6] + sumy[3] * sc8[7]);
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q1 += step;
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sc += step;
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dh += step;
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}
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y4 += 4 * QK_K;
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}
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for (int row = 0; row < N_DST; ++row) {
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all_sum = simd_sum(sumf[row]);
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if (tiisg == 0) {
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dst[r1*ne0 + first_row + row] = all_sum;
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}
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}
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}
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#else
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uint16_t aux16[2];
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thread const uint8_t * scales = (thread const uint8_t *)aux16;
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kernel void kernel_mul_mat_q4_K_f32(
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device const void * src0,
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device const float * src1,
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device float * dst,
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constant int64_t & ne00,
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constant int64_t & ne10,
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constant int64_t & ne0,
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constant int64_t & ne01[[buffer(4)]],
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uint2 tgpig[[threadgroup_position_in_grid]],
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uint tiisg[[thread_index_in_simdgroup]],
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uint sgitg[[simdgroup_index_in_threadgroup]]) {
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const int il = 4*tpitg.x;
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const int ix = tiisg/4; // 0...7
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const int it = tiisg%4; // 0...3
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for (int i = tpitg.y; i < nb; i += tptg.y) {
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const int nb = ne00/QK_K;
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const int r0 = tgpig.x;
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const int r1 = tgpig.y;
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const int first_row = (r0 * N_SIMDGROUP + sgitg) * N_DST;
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const int ib_row = first_row * nb;
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device const block_q4_K * x = (device const block_q4_K *) src0 + ib_row;
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device const float * y = (device const float *) src1 + r1*ne10;
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float yl[8];
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float yh[8];
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float sumf[N_DST]={0.f}, all_sum;
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device const uint8_t * q = x[i].qs + il;
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device const float * y = yy + i * QK_K + il;
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const int step = sizeof(block_q4_K) * nb / 2;
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const float d = (float)x[i].d[0];
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const float m = (float)x[i].d[1];
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device const float * y4 = y + ix * QK_K + 8 * it;
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device const uint16_t * a = (device const uint16_t *)x[i].scales;
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aux16[0] = a[0] & 0x0f0f;
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aux16[1] = (a[0] >> 4) & 0x0f0f;
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uint16_t sc16[4];
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for (int l = 0; l < 4; ++l) {
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sumf += d * scales[0] * (y[l+ 0] * (q[l] & 0xF) + y[l+16] * (q[l+16] & 0xF)) - m * scales[2] * (y[l+ 0] + y[l+16])
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+ d * scales[1] * (y[l+32] * (q[l] >> 4) + y[l+48] * (q[l+16] >> 4)) - m * scales[3] * (y[l+32] + y[l+48]);
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for (int ib = ix; ib < nb; ib += 8) {
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float2 sumy = {0.f, 0.f};
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for (int i = 0; i < 8; ++i) {
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yl[i] = y4[i+ 0]; sumy[0] += yl[i];
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yh[i] = y4[i+32]; sumy[1] += yh[i];
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}
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device const uint16_t * sc = (device const uint16_t *)x[ib].scales;
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device const uint16_t * qs = (device const uint16_t *)x[ib].qs + 4 * it;
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device const half * dh = x[ib].d;
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for (int row = 0; row < N_DST; row++) {
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sc16[0] = sc[0] & 0x000f;
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sc16[1] = sc[0] & 0x0f00;
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sc16[2] = sc[0] & 0x00f0;
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sc16[3] = sc[0] & 0xf000;
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float2 acc1 = {0.f, 0.f};
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float2 acc2 = {0.f, 0.f};
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for (int i = 0; i < 8; i += 2) {
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acc1[0] += yl[i+0] * (qs[i/2] & 0x000F);
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acc1[1] += yl[i+1] * (qs[i/2] & 0x0F00);
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acc2[0] += yh[i+0] * (qs[i/2] & 0x00F0);
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acc2[1] += yh[i+1] * (qs[i/2] & 0xF000);
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}
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float dall = dh[0];
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float dmin = dh[1];
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sumf[row] += dall * ((acc1[0] + 1.f/256.f * acc1[1]) * sc16[0] +
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(acc2[0] + 1.f/256.f * acc2[1]) * sc16[1] * 1.f/4096.f) -
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dmin * 1.f/16.f * (sumy[0] * sc16[2] + sumy[1] * sc16[3] * 1.f/256.f);
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qs += step;
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sc += step;
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dh += step;
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}
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y4 += 8 * QK_K;
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}
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for (int row = 0; row < N_DST; ++row) {
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all_sum = simd_sum(sumf[row]);
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if (tiisg == 0) {
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dst[r1*ne0 + first_row + row] = all_sum;
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}
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}
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}
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#endif
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sum[ith] = sumf;
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//
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// Accumulate the sum from all threads in the threadgroup
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// This version is slightly faster than the commented out one below,
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// which I copy-pasted from ggerganov's q4_0 dot product for metal.
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//
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threadgroup_barrier(mem_flags::mem_threadgroup);
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if (ith%4 == 0) {
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for (int i = 1; i < 4; ++i) sum[ith] += sum[ith + i];
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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if (ith%16 == 0) {
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for (int i = 4; i < 16; i += 4) sum[ith] += sum[ith + i];
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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if (ith == 0) {
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for (int i = 16; i < nth; i += 16) sum[0] += sum[i];
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dst[r1*ne0 + r0] = sum[0];
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}
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//// accumulate the sum from all threads in the threadgroup
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//threadgroup_barrier(mem_flags::mem_threadgroup);
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//for (uint i = nth/2; i > 0; i /= 2) {
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// if (ith < i) {
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// sum[ith] += sum[ith + i];
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// }
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// threadgroup_barrier(mem_flags::mem_threadgroup);
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//}
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//if (ith == 0) {
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// dst[r1*ne0 + r0] = sum[0];
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//}
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}
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kernel void kernel_mul_mat_q5_K_f32(
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device const void * src0,
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device const float * src1,
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