mirror of
https://github.com/ggerganov/llama.cpp.git
synced 2024-12-23 21:17:54 +01:00
metal : more optimizations (#2959)
* Very minor speedup via simd-group synchronization in f16 x f32 * Another very minor speedup on metal * Quite significant PP speedup on metal * Another attempt * Minor * Massive improvement for TG for fp16 * ~4-5% improvement for Q8_0 TG on metal --------- Co-authored-by: Iwan Kawrakow <iwan.kawrakow@gmail.com> Co-authored-by: Georgi Gerganov <ggerganov@gmail.com>
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Kawrakow
GitHub
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commit
ca82cf7bac
22
ggml-metal.m
22
ggml-metal.m
@ -76,6 +76,7 @@ struct ggml_metal_context {
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GGML_METAL_DECL_KERNEL(rms_norm);
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GGML_METAL_DECL_KERNEL(norm);
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GGML_METAL_DECL_KERNEL(mul_mat_f16_f32);
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GGML_METAL_DECL_KERNEL(mul_mat_f16_f32_1row);
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GGML_METAL_DECL_KERNEL(mul_mat_q4_0_f32);
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GGML_METAL_DECL_KERNEL(mul_mat_q4_1_f32);
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GGML_METAL_DECL_KERNEL(mul_mat_q8_0_f32);
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@ -219,6 +220,7 @@ struct ggml_metal_context * ggml_metal_init(int n_cb) {
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GGML_METAL_ADD_KERNEL(rms_norm);
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GGML_METAL_ADD_KERNEL(norm);
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GGML_METAL_ADD_KERNEL(mul_mat_f16_f32);
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GGML_METAL_ADD_KERNEL(mul_mat_f16_f32_1row);
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GGML_METAL_ADD_KERNEL(mul_mat_q4_0_f32);
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GGML_METAL_ADD_KERNEL(mul_mat_q4_1_f32);
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GGML_METAL_ADD_KERNEL(mul_mat_q8_0_f32);
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@ -284,6 +286,7 @@ void ggml_metal_free(struct ggml_metal_context * ctx) {
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GGML_METAL_DEL_KERNEL(rms_norm);
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GGML_METAL_DEL_KERNEL(norm);
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GGML_METAL_DEL_KERNEL(mul_mat_f16_f32);
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GGML_METAL_DEL_KERNEL(mul_mat_f16_f32_1row);
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GGML_METAL_DEL_KERNEL(mul_mat_q4_0_f32);
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GGML_METAL_DEL_KERNEL(mul_mat_q4_1_f32);
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GGML_METAL_DEL_KERNEL(mul_mat_q8_0_f32);
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@ -868,7 +871,11 @@ void ggml_metal_graph_compute(
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{
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nth0 = 32;
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nth1 = 1;
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[encoder setComputePipelineState:ctx->pipeline_mul_mat_f16_f32];
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if (ne11 * ne12 < 4) {
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[encoder setComputePipelineState:ctx->pipeline_mul_mat_f16_f32_1row];
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} else {
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[encoder setComputePipelineState:ctx->pipeline_mul_mat_f16_f32];
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}
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} break;
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case GGML_TYPE_Q4_0:
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{
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@ -920,8 +927,8 @@ void ggml_metal_graph_compute(
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GGML_ASSERT(ne02 == 1);
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GGML_ASSERT(ne12 == 1);
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nth0 = 2;
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nth1 = 32;
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nth0 = 4; //1;
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nth1 = 8; //32;
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[encoder setComputePipelineState:ctx->pipeline_mul_mat_q4_K_f32];
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} break;
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case GGML_TYPE_Q5_K:
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@ -969,9 +976,12 @@ void ggml_metal_graph_compute(
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[encoder setBytes:&gqa length:sizeof(gqa) atIndex:17];
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if (src0t == GGML_TYPE_Q4_0 || src0t == GGML_TYPE_Q4_1 || src0t == GGML_TYPE_Q8_0 ||
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src0t == GGML_TYPE_Q2_K || src0t == GGML_TYPE_Q4_K) {
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src0t == GGML_TYPE_Q2_K) {// || src0t == GGML_TYPE_Q4_K) {
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[encoder dispatchThreadgroups:MTLSizeMake((ne01 + 7)/8, ne11, ne12) threadsPerThreadgroup:MTLSizeMake(nth0, nth1, 1)];
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}
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else if (src0t == GGML_TYPE_Q4_K) {
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[encoder dispatchThreadgroups:MTLSizeMake((ne01 + 3)/4, ne11, ne12) threadsPerThreadgroup:MTLSizeMake(nth0, nth1, 1)];
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}
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else if (src0t == GGML_TYPE_Q3_K) {
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#ifdef GGML_QKK_64
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[encoder dispatchThreadgroups:MTLSizeMake((ne01 + 1)/2, ne11, ne12) threadsPerThreadgroup:MTLSizeMake(nth0, nth1, 1)];
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@ -985,8 +995,8 @@ void ggml_metal_graph_compute(
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else if (src0t == GGML_TYPE_Q6_K) {
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[encoder dispatchThreadgroups:MTLSizeMake((ne01 + 1)/2, ne11, ne12) threadsPerThreadgroup:MTLSizeMake(nth0, nth1, 1)];
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} else {
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[encoder setThreadgroupMemoryLength:nth0*sizeof(float) atIndex:0];
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[encoder dispatchThreadgroups:MTLSizeMake(ne01, ne11, ne12) threadsPerThreadgroup:MTLSizeMake(nth0, nth1, 1)];
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int64_t ny = (ne11 + 3)/4;
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[encoder dispatchThreadgroups:MTLSizeMake(ne01, ny, ne12) threadsPerThreadgroup:MTLSizeMake(nth0, nth1, 1)];
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}
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}
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} break;
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226
ggml-metal.metal
226
ggml-metal.metal
@ -133,19 +133,24 @@ kernel void kernel_soft_max(
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threadgroup_barrier(mem_flags::mem_threadgroup);
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}
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// broadcast
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if (tpitg[0] == 0) {
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buf[0] = buf[0];
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}
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//// broadcast - not needed. There is a threadgroup barrier above in the last iteration of
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// the loop, and when that is done, buf[0] has the correct (synchronized) value
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//if (tpitg[0] == 0) {
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// buf[0] = buf[0];
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//}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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//threadgroup_barrier(mem_flags::mem_threadgroup);
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const float max = buf[0];
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// parallel sum
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buf[tpitg[0]] = 0.0f;
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for (int i00 = tpitg[0]; i00 < ne00; i00 += ntg[0]) {
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buf[tpitg[0]] += exp(psrc0[i00] - max);
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const float exp_psrc0 = exp(psrc0[i00] - max);
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buf[tpitg[0]] += exp_psrc0;
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// Remember the result of exp here. exp is expensive, so we really do not
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// whish to compute it twice.
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pdst[i00] = exp_psrc0;
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}
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// reduce
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@ -157,17 +162,18 @@ kernel void kernel_soft_max(
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threadgroup_barrier(mem_flags::mem_threadgroup);
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}
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// broadcast
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if (tpitg[0] == 0) {
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buf[0] = buf[0];
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}
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// broadcast - not needed, see above
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//// broadcast
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//if (tpitg[0] == 0) {
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// buf[0] = buf[0];
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//}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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//threadgroup_barrier(mem_flags::mem_threadgroup);
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const float sum = buf[0];
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for (int i00 = tpitg[0]; i00 < ne00; i00 += ntg[0]) {
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pdst[i00] = exp(psrc0[i00] - max) / sum;
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pdst[i00] /= sum;
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}
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}
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@ -214,25 +220,27 @@ kernel void kernel_norm(
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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}
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// broadcast
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if (tpitg == 0) {
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sum[0] /= ne00;
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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//// broadcast
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//if (tpitg == 0) {
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// sum[0] /= ne00;
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//}
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//threadgroup_barrier(mem_flags::mem_threadgroup);
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const float mean = sum[0];
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// recenter
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// recenter and VARIANCE
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device float * y = dst + tgpig*ne00;
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for (int i00 = tpitg; i00 < ne00; i00 += ntg) {
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y[i00] = x[i00] - mean;
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}
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// VARIANCE
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// parallel sum
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sum[tpitg] = 0.0f;
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for (int i00 = tpitg; i00 < ne00; i00 += ntg) {
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y[i00] = x[i00] - mean;
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sum[tpitg] += y[i00] * y[i00];
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}
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//// VARIANCE
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//// parallel sum
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//sum[tpitg] = 0.0f;
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//for (int i00 = tpitg; i00 < ne00; i00 += ntg) {
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// sum[tpitg] += y[i00] * y[i00];
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//}
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// reduce
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threadgroup_barrier(mem_flags::mem_threadgroup);
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for (uint i = ntg/2; i > 0; i /= 2) {
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@ -241,11 +249,11 @@ kernel void kernel_norm(
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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}
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// broadcast
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if (tpitg == 0) {
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sum[0] /= ne00;
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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//// broadcast
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//if (tpitg == 0) {
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// sum[0] /= ne00;
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//}
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//threadgroup_barrier(mem_flags::mem_threadgroup);
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const float variance = sum[0];
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const float scale = 1.0f/sqrt(variance + eps);
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@ -435,6 +443,8 @@ kernel void kernel_mul_mat_q4_1_f32(
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mul_vec_q_n_f32<block_q4_1, N_DST, N_SIMDGROUP, N_SIMDWIDTH>(src0,src1,dst,ne00,ne01,ne02,ne10,ne12,ne0,ne1,gqa,tgpig,tiisg,sgitg);
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}
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#define NB_Q8_0 8
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kernel void kernel_mul_mat_q8_0_f32(
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device const void * src0,
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device const float * src1,
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@ -463,30 +473,30 @@ kernel void kernel_mul_mat_q8_0_f32(
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device const block_q8_0 * x = (device const block_q8_0 *) src0 + offset0;
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device const float * y = (device const float *) src1 + r1*ne10 + im*ne00*ne1;
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float yl[16];
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float yl[NB_Q8_0];
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float sumf[nr]={0.f};
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const int ix = tiisg/2;
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const int il = tiisg%2;
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const int ix = tiisg/4;
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const int il = tiisg%4;
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device const float * yb = y + ix * QK8_0 + 16*il;
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device const float * yb = y + ix * QK8_0 + NB_Q8_0*il;
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// each thread in a SIMD group deals with half a block.
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for (int ib = ix; ib < nb; ib += nw/2) {
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for (int i = 0; i < 16; ++i) {
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// each thread in a SIMD group deals with NB_Q8_0 quants at a time
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for (int ib = ix; ib < nb; ib += nw/4) {
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for (int i = 0; i < NB_Q8_0; ++i) {
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yl[i] = yb[i];
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}
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for (int row = 0; row < nr; row++) {
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device const int8_t * qs = x[ib+row*nb].qs + 16*il;
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device const int8_t * qs = x[ib+row*nb].qs + NB_Q8_0*il;
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float sumq = 0.f;
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for (int iq = 0; iq < 16; ++iq) {
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for (int iq = 0; iq < NB_Q8_0; ++iq) {
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sumq += qs[iq] * yl[iq];
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}
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sumf[row] += sumq*x[ib+row*nb].d;
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}
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yb += QK8_0 * 16;
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yb += NB_Q8_0 * nw;
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}
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for (int row = 0; row < nr; ++row) {
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@ -497,6 +507,60 @@ kernel void kernel_mul_mat_q8_0_f32(
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}
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}
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kernel void kernel_mul_mat_f16_f32_1row(
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device const char * src0,
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device const char * src1,
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device float * dst,
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constant int64_t & ne00,
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constant int64_t & ne01,
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constant int64_t & ne02,
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constant uint64_t & nb00,
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constant uint64_t & nb01,
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constant uint64_t & nb02,
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constant int64_t & ne10,
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constant int64_t & ne11,
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constant int64_t & ne12,
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constant uint64_t & nb10,
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constant uint64_t & nb11,
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constant uint64_t & nb12,
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constant int64_t & ne0,
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constant int64_t & ne1,
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uint3 tgpig[[threadgroup_position_in_grid]],
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uint tiisg[[thread_index_in_simdgroup]]) {
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const int64_t r0 = tgpig.x;
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const int64_t r1 = tgpig.y;
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const int64_t im = tgpig.z;
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device const half * x = (device const half *) (src0 + r0*nb01 + im/(ne12/ne02)*nb02);
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device const float * y = (device const float *) (src1 + r1*nb11 + im*nb12);
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float sumf = 0;
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if (ne00 < 128) {
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for (int i = tiisg; i < ne00; i += 32) {
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sumf += (float) x[i] * (float) y[i];
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}
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float all_sum = simd_sum(sumf);
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if (tiisg == 0) {
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dst[im*ne1*ne0 + r1*ne0 + r0] = all_sum;
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}
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} else {
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device const half4 * x4 = (device const half4 *) x;
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device const float4 * y4 = (device const float4 *) y;
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for (int i = tiisg; i < ne00/4; i += 32) {
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for (int k = 0; k < 4; ++k) sumf += (float)x4[i][k] * y4[i][k];
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}
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float all_sum = simd_sum(sumf);
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if (tiisg == 0) {
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for (int i = 4*(ne00/4); i < ne00; ++i) sumf += (float) x[i] * y[i];
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dst[im*ne1*ne0 + r1*ne0 + r0] = all_sum;
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}
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}
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}
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#define N_F16_F32 4
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kernel void kernel_mul_mat_f16_f32(
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device const char * src0,
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device const char * src1,
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@ -515,55 +579,58 @@ kernel void kernel_mul_mat_f16_f32(
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constant uint64_t & nb12,
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constant int64_t & ne0,
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constant int64_t & ne1,
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threadgroup float * sum [[threadgroup(0)]],
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uint3 tgpig[[threadgroup_position_in_grid]],
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uint3 tpig[[thread_position_in_grid]],
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uint3 tpitg[[thread_position_in_threadgroup]],
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uint3 tptg[[threads_per_threadgroup]]) {
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uint tiisg[[thread_index_in_simdgroup]]) {
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const int64_t r0 = tgpig.x;
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const int64_t r1 = tgpig.y;
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const int64_t rb = N_F16_F32*tgpig.y;
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const int64_t im = tgpig.z;
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device const half * x = (device const half *) (src0 + r0*nb01 + im/(ne12/ne02)*nb02);
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device const float * y = (device const float *) (src1 + r1*nb11 + im*nb12);
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device const half * x = (device const half *) (src0 + r0*nb01 + im/(ne12/ne02)*nb02);
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uint ith = tpitg.x;
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uint nth = tptg.x;
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if (ne00 < 128) {
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for (int row = 0; row < N_F16_F32; ++row) {
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int r1 = rb + row;
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if (r1 >= ne11) {
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break;
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}
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sum[ith] = 0.0f;
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device const float * y = (device const float *) (src1 + r1*nb11 + im*nb12);
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for (int i = ith; i < ne00; i += nth) {
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sum[ith] += (float) x[i] * (float) y[i];
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float sumf = 0;
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for (int i = tiisg; i < ne00; i += 32) {
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sumf += (float) x[i] * (float) y[i];
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}
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float all_sum = simd_sum(sumf);
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if (tiisg == 0) {
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dst[im*ne1*ne0 + r1*ne0 + r0] = all_sum;
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}
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}
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} else {
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device const half4 * x4 = (device const half4 *)x;
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for (int row = 0; row < N_F16_F32; ++row) {
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int r1 = rb + row;
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if (r1 >= ne11) {
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break;
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}
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device const float * y = (device const float *) (src1 + r1*nb11 + im*nb12);
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device const float4 * y4 = (device const float4 *) y;
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float sumf = 0;
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for (int i = tiisg; i < ne00/4; i += 32) {
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for (int k = 0; k < 4; ++k) sumf += (float) x4[i][k] * y4[i][k];
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}
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float all_sum = simd_sum(sumf);
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if (tiisg == 0) {
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for (int i = 4*(ne00/4); i < ne00; ++i) sumf += (float) x[i] * y[i];
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dst[im*ne1*ne0 + r1*ne0 + r0] = all_sum;
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}
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}
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}
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// accumulate the sum from all threads in the threadgroup
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threadgroup_barrier(mem_flags::mem_threadgroup);
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if (ith%4 == 0) {
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for (int i = 1; i < 4; ++i) sum[ith] += sum[ith + i];
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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if (ith%16 == 0) {
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for (int i = 4; i < 16; i += 4) sum[ith] += sum[ith + i];
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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if (ith == 0) {
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for (int i = 16; i < nth; i += 16) sum[0] += sum[i];
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dst[im*ne1*ne0 + r1*ne0 + r0] = sum[0];
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}
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// Original implementation. Left behind commented out for now
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//threadgroup_barrier(mem_flags::mem_threadgroup);
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//for (uint i = tptg.x/2; i > 0; i /= 2) {
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// if (tpitg.x < i) {
|
||||
// sum[tpitg.x] += sum[tpitg.x + i];
|
||||
// }
|
||||
// threadgroup_barrier(mem_flags::mem_threadgroup);
|
||||
//}
|
||||
//
|
||||
//if (tpitg.x == 0) {
|
||||
// dst[im*ne1*ne0 + r1*ne0 + r0] = sum[0];
|
||||
//}
|
||||
}
|
||||
|
||||
kernel void kernel_alibi_f32(
|
||||
@ -1262,7 +1329,8 @@ kernel void kernel_mul_mat_q4_K_f32(
|
||||
const int r0 = tgpig.x;
|
||||
const int r1 = tgpig.y;
|
||||
const int r2 = tgpig.z;
|
||||
const int first_row = (r0 * N_SIMDGROUP + sgitg) * N_DST;
|
||||
//const int first_row = (r0 * N_SIMDGROUP + sgitg) * N_DST;
|
||||
const int first_row = r0 * N_DST;
|
||||
const int ib_row = first_row * nb;
|
||||
const uint offset0 = r2/gqa*(nb*ne0);
|
||||
device const block_q4_K * x = (device const block_q4_K *) src0 + ib_row + offset0;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user