mirror of
https://github.com/ggerganov/llama.cpp.git
synced 2024-12-23 21:17:54 +01:00
CUDA: more info when no device code (#5088)
This commit is contained in:
Johannes Gäßler
GitHub
parent
89758723c7
commit
9ecdd12e95
89
ggml-cuda.cu
89
ggml-cuda.cu
@ -13,6 +13,10 @@
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#include <map>
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#include <array>
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// stringize macro for converting __CUDA_ARCH_LIST__ (list of integers) to string
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#define STRINGIZE_IMPL(...) #__VA_ARGS__
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#define STRINGIZE(...) STRINGIZE_IMPL(__VA_ARGS__)
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#if defined(GGML_USE_HIPBLAS)
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#include <hip/hip_runtime.h>
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#include <hipblas/hipblas.h>
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@ -584,13 +588,28 @@ static cuda_device_capabilities g_device_caps[GGML_CUDA_MAX_DEVICES] = { {0, 0,
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static cublasHandle_t g_cublas_handles[GGML_CUDA_MAX_DEVICES] = {nullptr};
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[[noreturn]]
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static __device__ void bad_arch() {
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printf("ERROR: ggml-cuda was compiled without support for the current GPU architecture.\n");
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static __device__ void no_device_code(
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const char * file_name, const int line, const char * function_name, const int arch, const char * arch_list) {
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#if defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)
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printf("%s:%d: ERROR: HIP kernel %s has no device code compatible with HIP arch %d.\n",
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file_name, line, function_name, arch);
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(void) arch_list;
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#else
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printf("%s:%d: ERROR: CUDA kernel %s has no device code compatible with CUDA arch %d. ggml-cuda.cu was compiled for: %s\n",
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file_name, line, function_name, arch, arch_list);
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#endif // defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)
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__trap();
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(void) bad_arch; // suppress unused function warning
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(void) no_device_code; // suppress unused function warning
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}
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#ifdef __CUDA_ARCH__
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#define NO_DEVICE_CODE no_device_code(__FILE__, __LINE__, __FUNCTION__, __CUDA_ARCH__, STRINGIZE(__CUDA_ARCH_LIST__))
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#else
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#define NO_DEVICE_CODE GGML_ASSERT(false && "NO_DEVICE_CODE not valid in host code.")
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#endif // __CUDA_ARCH__
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static __device__ __forceinline__ float warp_reduce_sum(float x) {
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#pragma unroll
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for (int mask = 16; mask > 0; mask >>= 1) {
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@ -617,7 +636,7 @@ static __device__ __forceinline__ half2 warp_reduce_sum(half2 a) {
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return a;
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#else
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(void) a;
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bad_arch();
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NO_DEVICE_CODE;
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#endif // !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && __CUDA_ARCH__ >= CC_PASCAL
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}
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@ -638,7 +657,7 @@ static __device__ __forceinline__ half2 warp_reduce_max(half2 x) {
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return x;
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#else
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(void) x;
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bad_arch();
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NO_DEVICE_CODE;
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#endif // !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && __CUDA_ARCH__ >= CC_PASCAL && CUDART_VERSION >= CUDART_HMAX
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}
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@ -2421,7 +2440,7 @@ static __global__ void dequantize_block_q8_0_f16(const void * __restrict__ vx, h
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}
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#else
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(void) vx; (void) y; (void) k;
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= CC_PASCAL
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}
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@ -2452,7 +2471,7 @@ template <int vdr> static __device__ __forceinline__ float vec_dot_q4_0_q8_1_imp
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// second part effectively subtracts 8 from each quant value
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return d4 * (sumi * ds8f.x - (8*vdr/QI4_0) * ds8f.y);
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#else
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= MIN_CC_DP4A
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}
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@ -2489,7 +2508,7 @@ template <int vdr> static __device__ __forceinline__ float vec_dot_q4_1_q8_1_imp
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// scale second part of sum by QI8_1/(vdr * QR4_1) to compensate for multiple threads adding it
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return sumi * d4d8 + m4s8 / (QI8_1 / (vdr * QR4_1));
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#else
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= MIN_CC_DP4A
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}
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@ -2524,7 +2543,7 @@ template <int vdr> static __device__ __forceinline__ float vec_dot_q5_0_q8_1_imp
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// second part effectively subtracts 16 from each quant value
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return d5 * (sumi * ds8f.x - (16*vdr/QI5_0) * ds8f.y);
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#else
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= MIN_CC_DP4A
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}
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@ -2569,7 +2588,7 @@ template <int vdr> static __device__ __forceinline__ float vec_dot_q5_1_q8_1_imp
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return sumi*d5d8 + m5s8 / (QI5_1 / vdr);
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#else
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= MIN_CC_DP4A
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}
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@ -2590,7 +2609,7 @@ template <int vdr> static __device__ __forceinline__ float vec_dot_q8_0_q8_1_imp
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return d8_0*d8_1 * sumi;
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#else
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= MIN_CC_DP4A
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}
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@ -2620,7 +2639,7 @@ template <int vdr> static __device__ __forceinline__ float vec_dot_q8_1_q8_1_imp
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// scale second part of sum by QI8_1/ vdr to compensate for multiple threads adding it
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return sumi*d8d8 + m8s8 / (QI8_1 / vdr);
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#else
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= MIN_CC_DP4A
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}
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@ -2655,7 +2674,7 @@ static __device__ __forceinline__ float vec_dot_q2_K_q8_1_impl_mmvq(
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return dm2f.x*sumf_d - dm2f.y*sumf_m;
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#else
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= MIN_CC_DP4A
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}
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@ -2692,7 +2711,7 @@ static __device__ __forceinline__ float vec_dot_q2_K_q8_1_impl_mmq(
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return d8 * (dm2f.x*sumi_d - dm2f.y*sumi_m);
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#else
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= MIN_CC_DP4A
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}
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@ -2732,7 +2751,7 @@ static __device__ __forceinline__ float vec_dot_q3_K_q8_1_impl_mmvq(
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return d3 * sumf;
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#else
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= MIN_CC_DP4A
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}
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@ -2757,7 +2776,7 @@ static __device__ __forceinline__ float vec_dot_q3_K_q8_1_impl_mmq(
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return d3*d8 * sumi;
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#else
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= MIN_CC_DP4A
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}
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@ -2790,7 +2809,7 @@ static __device__ __forceinline__ float vec_dot_q4_K_q8_1_impl_vmmq(
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return dm4f.x*sumf_d - dm4f.y*sumf_m;
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#else
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= MIN_CC_DP4A
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}
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@ -2823,7 +2842,7 @@ static __device__ __forceinline__ float vec_dot_q4_K_q8_1_impl_mmq(
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return dm4f.x*sumf_d - dm4f.y*sumf_m;
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#else
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= MIN_CC_DP4A
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}
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@ -2863,7 +2882,7 @@ static __device__ __forceinline__ float vec_dot_q5_K_q8_1_impl_vmmq(
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return dm5f.x*sumf_d - dm5f.y*sumf_m;
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#else
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= MIN_CC_DP4A
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}
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@ -2896,7 +2915,7 @@ static __device__ __forceinline__ float vec_dot_q5_K_q8_1_impl_mmq(
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return dm4f.x*sumf_d - dm4f.y*sumf_m;
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#else
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= MIN_CC_DP4A
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}
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@ -2926,7 +2945,7 @@ static __device__ __forceinline__ float vec_dot_q6_K_q8_1_impl_mmvq(
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return d*sumf;
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#else
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= MIN_CC_DP4A
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}
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@ -2957,7 +2976,7 @@ static __device__ __forceinline__ float vec_dot_q6_K_q8_1_impl_mmq(
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return d6 * sumf_d;
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#else
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= MIN_CC_DP4A
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}
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@ -3823,7 +3842,7 @@ static __device__ __forceinline__ float vec_dot_q4_K_q8_1(
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return dall * sumf_d - dmin * sumf_m;
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#else
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= MIN_CC_DP4A
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#endif
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@ -4006,7 +4025,7 @@ static __device__ __forceinline__ float vec_dot_q5_K_q8_1(
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return d * sumf_d;
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#else
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= MIN_CC_DP4A
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#endif
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@ -4501,7 +4520,7 @@ template <bool need_check> static __global__ void
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(vx, vy, dst, ncols_x, nrows_x, ncols_y, nrows_y, nrows_dst);
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#else
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(void) vec_dot_q4_0_q8_1_mul_mat;
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= CC_VOLTA
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}
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@ -4570,7 +4589,7 @@ template <bool need_check> static __global__ void
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(vx, vy, dst, ncols_x, nrows_x, ncols_y, nrows_y, nrows_dst);
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#else
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(void) vec_dot_q4_1_q8_1_mul_mat;
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= CC_VOLTA
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}
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@ -4637,7 +4656,7 @@ template <bool need_check> static __global__ void
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(vx, vy, dst, ncols_x, nrows_x, ncols_y, nrows_y, nrows_dst);
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#else
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(void) vec_dot_q5_0_q8_1_mul_mat;
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= CC_VOLTA
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}
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@ -4704,7 +4723,7 @@ mul_mat_q5_1(
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(vx, vy, dst, ncols_x, nrows_x, ncols_y, nrows_y, nrows_dst);
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#else
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(void) vec_dot_q5_1_q8_1_mul_mat;
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= CC_VOLTA
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}
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@ -4771,7 +4790,7 @@ template <bool need_check> static __global__ void
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(vx, vy, dst, ncols_x, nrows_x, ncols_y, nrows_y, nrows_dst);
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#else
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(void) vec_dot_q8_0_q8_1_mul_mat;
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= CC_VOLTA
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}
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@ -4838,7 +4857,7 @@ mul_mat_q2_K(
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(vx, vy, dst, ncols_x, nrows_x, ncols_y, nrows_y, nrows_dst);
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#else
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(void) vec_dot_q2_K_q8_1_mul_mat;
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= CC_VOLTA
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}
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@ -4907,7 +4926,7 @@ template <bool need_check> static __global__ void
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(vx, vy, dst, ncols_x, nrows_x, ncols_y, nrows_y, nrows_dst);
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#else
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(void) vec_dot_q3_K_q8_1_mul_mat;
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= CC_VOLTA
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}
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@ -4976,7 +4995,7 @@ template <bool need_check> static __global__ void
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(vx, vy, dst, ncols_x, nrows_x, ncols_y, nrows_y, nrows_dst);
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#else
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(void) vec_dot_q4_K_q8_1_mul_mat;
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= CC_VOLTA
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}
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@ -5043,7 +5062,7 @@ mul_mat_q5_K(
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(vx, vy, dst, ncols_x, nrows_x, ncols_y, nrows_y, nrows_dst);
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#else
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(void) vec_dot_q5_K_q8_1_mul_mat;
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= CC_VOLTA
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}
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@ -5112,7 +5131,7 @@ template <bool need_check> static __global__ void
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(vx, vy, dst, ncols_x, nrows_x, ncols_y, nrows_y, nrows_dst);
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#else
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(void) vec_dot_q6_K_q8_1_mul_mat;
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bad_arch();
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= CC_VOLTA
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}
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@ -5835,7 +5854,7 @@ static __global__ void soft_max_f16(const float * x, const float * y, float * ds
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}
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#else
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(void) x; (void) y; (void) dst; (void) ncols_par; (void) nrows_y; (void) scale;
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bad_arch();
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NO_DEVICE_CODE;
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#endif // !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && __CUDA_ARCH__ >= CC_PASCAL && CUDART_VERSION >= CUDART_HMAX
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}
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